###############################################################################
## @copyright Copyright (c) 2022 OnMicro Corp.
## @brief     OpenMSP430 SoC simulator environment.
## @author    wei.lu@onmicro.com.cn
## @license   SPDX-License-Identifier: Apache-2.0
###############################################################################
SOC          = openMSP430

# Test case list is src_c or in prebuilt/openmsp430/: src_c, dhrystone_4mcu, coremark_v1.0
CASE         = dhrystone_4mcu

# Simulator: iverilog, verilator, vcs
SIM          = iverilog
# Dump waveform: off, on
DUMP         = off

# Common verilog sources of openmsp430 SoC.
SRC_DIR      = ../../ip/peripheral/omsp_gpio/src_v
SRC_DIR     += ../../ip/peripheral/omsp_timer/src_v
SRC_DIR     += ../../ip/cpu/openmsp430/src_v

# Test bench verilog sources and includes.
SRC_DIR     += ./src_v
INC_DIR      = ./inc_v

# Test Case stimulus file.
INC_DIR += ./$(CASE)

EXTRA_VFLAGS += ASIC

# Testbench verilog file list of openmsp430.
#SIM_FILELIST = -f ../src_v/tb.fl
ifeq ($(SIM),verilator)
SIM_FILELIST = ../src_cc/sim_main.cpp
endif

# Common logic to run simulator.
include ../common/Makefile.sim

# Generate program memory pattern to load by simulator.
vmem: | $(PROJECT_DIR)
ifeq ($(CASE),src_c)
	make -C src_c clean
	make -C src_c
	msp430-elf-objcopy -O ihex src_c/c.elf $(PROJECT_DIR)/pmem.ihex
else
	msp430-elf-objcopy -O ihex ../../prebuilt/$(SOC)/$(CASE).elf $(PROJECT_DIR)/pmem.ihex
endif
	#define PMEM_SIZE in openMSP430_defines.v
	../../tool/tcl/ihex2mem.tcl -ihex $(PROJECT_DIR)/pmem.ihex -out $(PROJECT_DIR)/pmem.mem -mem_size 49152
